Summary
The Ferro4EdgeAI project will provide an ultra-low power, scalable edge accelerator for artificial intelligence incorporating a memory augmented neural network, based on low cost, high density, multi-level, Back End of Line (BEoL) integrated ferroelectric (FE) technology.
We expect to achieve a 2500x gain in energy-efficiency to break the POPS/W barrier with respect to the state-of-the-art CMOS accelerators and predictions for other emerging technology AI hardware. To do so, five ambitious specific objectives have been selected:
- multi-level functionality in hafnia-based thin films by investigating the optimum trade-off in memory window, film thickness & stability of the ferroelectric state
- low operating voltage for the non-volatile memory and robust multilevel operation of the FeFET-2 for high density logic operations and data storage. A low operating voltage is mandatory for power rating reduction, while robust multilevel operation is essential for analogue in-memory computing at the edge.
- integration and characterization of multi-level, low voltage, FeFET-2 arrays
- definition, design and demonstration of a low power FE AI accelerator suitable for scalable systems integration
- Systems simulation of ultra-low power FE accelerator enhanced edge processing for targeted edge applications of voice and image recognition
Ferro4EdgeAI is a multidisciplinary project engaging 12 partners from 6 countries covering the academic and industrial worlds (including 2 SMEs). An implementation plan is presented in the form of 6 work packages, 5 of which are technical in nature. Synergy in communication and dissemination by the several partners and stakeholders (including an external advisory board and collaboration with South Korea) will maximize the project progress and impact. Solutions to overcome the fundamental technological barriers as well as appropriate deliverables, tasks, milestones, and risks to complete the project objectives in due time are presented.
We expect to achieve a 2500x gain in energy-efficiency to break the POPS/W barrier with respect to the state-of-the-art CMOS accelerators and predictions for other emerging technology AI hardware. To do so, five ambitious specific objectives have been selected:
- multi-level functionality in hafnia-based thin films by investigating the optimum trade-off in memory window, film thickness & stability of the ferroelectric state
- low operating voltage for the non-volatile memory and robust multilevel operation of the FeFET-2 for high density logic operations and data storage. A low operating voltage is mandatory for power rating reduction, while robust multilevel operation is essential for analogue in-memory computing at the edge.
- integration and characterization of multi-level, low voltage, FeFET-2 arrays
- definition, design and demonstration of a low power FE AI accelerator suitable for scalable systems integration
- Systems simulation of ultra-low power FE accelerator enhanced edge processing for targeted edge applications of voice and image recognition
Ferro4EdgeAI is a multidisciplinary project engaging 12 partners from 6 countries covering the academic and industrial worlds (including 2 SMEs). An implementation plan is presented in the form of 6 work packages, 5 of which are technical in nature. Synergy in communication and dissemination by the several partners and stakeholders (including an external advisory board and collaboration with South Korea) will maximize the project progress and impact. Solutions to overcome the fundamental technological barriers as well as appropriate deliverables, tasks, milestones, and risks to complete the project objectives in due time are presented.
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More information & hyperlinks
| Web resources: | https://cordis.europa.eu/project/id/101135656 |
| Start date: | 01-01-2024 |
| End date: | 31-12-2027 |
| Total budget - Public funding: | 3 959 917,25 Euro - 3 750 364,00 Euro |
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Original description
The Ferro4EdgeAI project will provide an ultra-low power, scalable edge accelerator for artificial intelligence incorporating a memory augmented neural network, based on low cost, high density, multi-level, Back End of Line (BEoL) integrated ferroelectric (FE) technology.We expect to achieve a 2500x gain in energy-efficiency to break the POPS/W barrier with respect to the state-of-the-art CMOS accelerators and predictions for other emerging technology AI hardware. To do so, five ambitious specific objectives have been selected:
- multi-level functionality in hafnia-based thin films by investigating the optimum trade-off in memory window, film thickness & stability of the ferroelectric state
- low operating voltage for the non-volatile memory and robust multilevel operation of the FeFET-2 for high density logic operations and data storage. A low operating voltage is mandatory for power rating reduction, while robust multilevel operation is essential for analogue in-memory computing at the edge.
- integration and characterization of multi-level, low voltage, FeFET-2 arrays
- definition, design and demonstration of a low power FE AI accelerator suitable for scalable systems integration
- Systems simulation of ultra-low power FE accelerator enhanced edge processing for targeted edge applications of voice and image recognition
Ferro4EdgeAI is a multidisciplinary project engaging 12 partners from 6 countries covering the academic and industrial worlds (including 2 SMEs). An implementation plan is presented in the form of 6 work packages, 5 of which are technical in nature. Synergy in communication and dissemination by the several partners and stakeholders (including an external advisory board and collaboration with South Korea) will maximize the project progress and impact. Solutions to overcome the fundamental technological barriers as well as appropriate deliverables, tasks, milestones, and risks to complete the project objectives in due time are presented.
Status
SIGNEDCall topic
HORIZON-CL4-2023-DIGITAL-EMERGING-01-11Update Date
12-03-2024
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Organisations
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| COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES (CEA) (Coördinator)
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| AICTX AG (aiCTX AG)
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| CENTRALE INNOVATION SA
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| CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS)
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| ECOLE CENTRALE DE LYON
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| ECOLE SUPERIEURE DE CHIMIE PHYSIQUE ELECTRONIQUE DE LYON
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| FERROELECTRIC MEMORY GMBH (FMC)
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| INSTITUT NATIONAL DES SCIENCES APPLIQUEES DE LYON
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| NAMLAB GGMBH (NaMLab gGmbH)
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| STMICROELECTRONICS CROLLES 2 SAS (STM CROLLES)
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| STMICROELECTRONICS ROUSSET SAS (ST-ROU)
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| STMICROELECTRONICS SRL
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| TECHNISCHE UNIVERSITEIT DELFT