Summary
SOTMEM addresses the growing need for scalable ultrafast non-volatile memories (NVM) to improve the reliability of logic circuitry and to reduce the ever increasing power consumption and energy loss in microprocessors. Major technology actors and end-user companies are developing magnetic RAM (MRAM) as it is recognized as one of the most promising emerging NVMs. However, mainstream MRAM, relying on spin transfer torque, suffers from limited speed, and reliability and degradation issues. These three obstacles, which impede the widespread implementation of MRAM, can be mitigated using a novel device architecture based on spin-orbit torque (SOT). But even SOT-MRAM brings challenges in the form of too large writing current density and power dissipation . SOTMEM will validate SOT switches for SOT-MRAM using topological insulators embedded in a novel material stack that we have recently developed for optimal writing efficiency. Writing at ultralow power is therefore the key technical objective of this ERC Proof of Concept project. A successful outcome would represent a major breakthrough for SOT-MRAM commercialization. Therefore SOTMEM stands to have enormous impact in the transition towards low-power, power-fail protected microprocessors with non-volatile memories. Special efforts will be devoted to market analysis and patentability studies, as well as targeted industry engagement to allow the design of a nuanced business model aiming to deliver SOTMEM technologies and knowhow to potential end users.
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| Web resources: | https://cordis.europa.eu/project/id/899896 |
| Start date: | 01-05-2020 |
| End date: | 31-05-2022 |
| Total budget - Public funding: | - 150 000,00 Euro |
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Original description
SOTMEM addresses the growing need for scalable ultrafast non-volatile memories (NVM) to improve the reliability of logic circuitry and to reduce the ever increasing power consumption and energy loss in microprocessors. Major technology actors and end-user companies are developing magnetic RAM (MRAM) as it is recognized as one of the most promising emerging NVMs. However, mainstream MRAM, relying on spin transfer torque, suffers from limited speed, and reliability and degradation issues. These three obstacles, which impede the widespread implementation of MRAM, can be mitigated using a novel device architecture based on spin-orbit torque (SOT). But even SOT-MRAM brings challenges in the form of too large writing current density and power dissipation . SOTMEM will validate SOT switches for SOT-MRAM using topological insulators embedded in a novel material stack that we have recently developed for optimal writing efficiency. Writing at ultralow power is therefore the key technical objective of this ERC Proof of Concept project. A successful outcome would represent a major breakthrough for SOT-MRAM commercialization. Therefore SOTMEM stands to have enormous impact in the transition towards low-power, power-fail protected microprocessors with non-volatile memories. Special efforts will be devoted to market analysis and patentability studies, as well as targeted industry engagement to allow the design of a nuanced business model aiming to deliver SOTMEM technologies and knowhow to potential end users.Status
CLOSEDCall topic
ERC-2019-POCUpdate Date
27-04-2024
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