VEGAS | Validation of European high capacity rad-hard FPGA and software tools

Summary
VEGAS proposes to address the key challenge of European non-dependence and competitivness regarding rad-hard FPGA for space applications. VEGAS will evaluate (following ESCC rules) and validate the first rad-hard FPGA in 65nm to directly compete with the US offering and reach TRL 7.
The VEGAS project sets clear and measurable main objectives to reach a TRL 7 from TRL 5 (end of BRAVE project) as follows:
1. Validation by end users of rad-hard FPGA developped under the BRAVE project – TRL 6 achieved
2. Space evaluation of the first rad-hard FPGA developped under the BRAVE project – TRL 7 achieved
3. Software CAD tools improvement by including timing and SEE mitigation tools

VEGAS will complement the ongoing ESA funded BRAVE project. BRAVE covers all hardware and software development to reach a first prototype of NG-FPGA-MEDIUM (30k LUTs) and NG-FPGA-LARGE (130k LUTs) . VEGAS will cover all required steps to ESCC evaluate / validate the BRAVE NG-FPGA-MEDIUM and NG-FPGA-LARGE prototype and add additional software tools to reach a competitive software offering.
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More information & hyperlinks
Web resources: https://cordis.europa.eu/project/id/687220
Start date: 01-01-2016
End date: 31-08-2020
Total budget - Public funding: 3 976 861,25 Euro - 3 975 311,00 Euro
Cordis data

Original description

VEGAS proposes to address the key challenge of European non-dependence and competitivness regarding rad-hard FPGA for space applications. VEGAS will evaluate (following ESCC rules) and validate the first rad-hard FPGA in 65nm to directly compete with the US offering and reach TRL 7.
The VEGAS project sets clear and measurable main objectives to reach a TRL 7 from TRL 5 (end of BRAVE project) as follows:
1. Validation by end users of rad-hard FPGA developped under the BRAVE project – TRL 6 achieved
2. Space evaluation of the first rad-hard FPGA developped under the BRAVE project – TRL 7 achieved
3. Software CAD tools improvement by including timing and SEE mitigation tools

VEGAS will complement the ongoing ESA funded BRAVE project. BRAVE covers all hardware and software development to reach a first prototype of NG-FPGA-MEDIUM (30k LUTs) and NG-FPGA-LARGE (130k LUTs) . VEGAS will cover all required steps to ESCC evaluate / validate the BRAVE NG-FPGA-MEDIUM and NG-FPGA-LARGE prototype and add additional software tools to reach a competitive software offering.

Status

CLOSED

Call topic

COMPET-01-2015

Update Date

27-10-2022
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Horizon 2020
H2020-EU.2. INDUSTRIAL LEADERSHIP
H2020-EU.2.1. INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies
H2020-EU.2.1.6. INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies – Space
H2020-EU.2.1.6.0. Cross-cutting call topics
H2020-COMPET-2015
COMPET-01-2015 Technologies for European non-dependence and competitiveness