Summary
Quantum computing is now widely regarded by many in academia, governments and industry to represent a major new frontier in information technology with the potential for a disruptive impact. Many different materials and approaches have been explored, with a narrowing of focus in recent years on scalable implementations based on solid state platforms. In particular, there is now strong evidence that silicon, the primary platform technology for today’s processor technology, inherently possesses many key properties that make it advantageous for quantum computing. Two types of qubit based on spins in silicon nano-devices made in academic research labs have already been reported with demonstrated high-fidelity operation. Our project builds on this success and aims to take this technology to the next readiness level by showing that silicon-based qubits can be realised within a full CMOS platform, using the 300mm-scale fabrication facilities in our consortium. In doing so we will demonstrate the true potential of silicon based qubits in terms of scalability and manufacturability.
Our focus is on distilling the silicon device design down to the simplest core element necessary to demonstrate qubit behaviour, in order to lay the foundation for a scalable technology. We will design, model and fabricate these qubit devices, and then benchmark them using key operating parameters. Our attention is not limited at the lowest level technology layer where the qubits reside, and includes higher control layers necessary to operate such devices, including demonstrating strategies for achieving local control and readout in large-scale arrays without cross-talk and developing cryo-CMOS electronics to support the qubit operation. Both of these may be spun-out and yield their own technological impacts. Thus, our holistic approach offers a wider opportunity to harness the tremendous proven capabilities of integrated CMOS technology to become a key driver of quantum technology development.
Our focus is on distilling the silicon device design down to the simplest core element necessary to demonstrate qubit behaviour, in order to lay the foundation for a scalable technology. We will design, model and fabricate these qubit devices, and then benchmark them using key operating parameters. Our attention is not limited at the lowest level technology layer where the qubits reside, and includes higher control layers necessary to operate such devices, including demonstrating strategies for achieving local control and readout in large-scale arrays without cross-talk and developing cryo-CMOS electronics to support the qubit operation. Both of these may be spun-out and yield their own technological impacts. Thus, our holistic approach offers a wider opportunity to harness the tremendous proven capabilities of integrated CMOS technology to become a key driver of quantum technology development.
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| Web resources: | https://cordis.europa.eu/project/id/688539 |
| Start date: | 01-04-2016 |
| End date: | 30-09-2019 |
| Total budget - Public funding: | 3 973 360,75 Euro - 3 450 622,00 Euro |
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Original description
Quantum computing is now widely regarded by many in academia, governments and industry to represent a major new frontier in information technology with the potential for a disruptive impact. Many different materials and approaches have been explored, with a narrowing of focus in recent years on scalable implementations based on solid state platforms. In particular, there is now strong evidence that silicon, the primary platform technology for today’s processor technology, inherently possesses many key properties that make it advantageous for quantum computing. Two types of qubit based on spins in silicon nano-devices made in academic research labs have already been reported with demonstrated high-fidelity operation. Our project builds on this success and aims to take this technology to the next readiness level by showing that silicon-based qubits can be realised within a full CMOS platform, using the 300mm-scale fabrication facilities in our consortium. In doing so we will demonstrate the true potential of silicon based qubits in terms of scalability and manufacturability.Our focus is on distilling the silicon device design down to the simplest core element necessary to demonstrate qubit behaviour, in order to lay the foundation for a scalable technology. We will design, model and fabricate these qubit devices, and then benchmark them using key operating parameters. Our attention is not limited at the lowest level technology layer where the qubits reside, and includes higher control layers necessary to operate such devices, including demonstrating strategies for achieving local control and readout in large-scale arrays without cross-talk and developing cryo-CMOS electronics to support the qubit operation. Both of these may be spun-out and yield their own technological impacts. Thus, our holistic approach offers a wider opportunity to harness the tremendous proven capabilities of integrated CMOS technology to become a key driver of quantum technology development.
Status
CLOSEDCall topic
ICT-25-2015Update Date
27-10-2022
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Organisations
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| COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES (CEA) (Coördinator)
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| CONSIGLIO NAZIONALE DELLE RICERCHE (CNR)
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| ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)
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| HITACHI EUROPE LIMITED
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| KOBENHAVNS UNIVERSITET
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| TEKNOLOGIAN TUTKIMUSKESKUS VTT OY
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| UNIVERSITY COLLEGE LONDON