Modeling and simulation methodology for considering delamination and bonding pull out in a SiC MOSFET chip during the short-circuit phase

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Authors: Alstom, Tarbes, France Université de Pau & des pays de l’Adour, E2S UPPA, SIAME, Pau, France yannick.dumollard@alstomgroup .com Emmanuel Batista Alstom, Tarbes, France emmanuel.batista@alstomgroup. com Laurent Pecastaing Université de Pau & des pays de l’Adour, E2S UPPA, SIAME, Pau, France laurent.pecastaing@univ-pau.fr Jean-Marc Dienot Université de Pau & des pays de l’Adour, E2S UP

Journal publisher: PEDG

Published year: 2021