Tool flow for automatic generation of architectures and test-cases to enable the evaluation of CGRAs in the context of HPC applications

Summary

This is a publication. If there is no link to the publication on this page, you can try the pre-formated search via the search engines listed on this page.

Authors: Florian Fricke, Andre Werner, Michael Hubner

Journal title: 2017 Conference on Design and Architectures for Signal and Image Processing (DASIP)

Journal publisher: IEEE

Published year: 2017

Published pages: 1-2

DOI identifier: 10.1109/DASIP.2017.8122124

ISBN: 978-1-5386-3534-6