A RISC-V in-network accelerator for flexible high-performance low-power packet processing

This is a publication. If there is no link to the publication on this page, you can try the pre-formated search via the search engines listed on this page.

Authors: Salvatore Di Girolamo; Andreas Kurth; Alexandru Calotoiu; Thomas Benz; Timo Schneider; Jakub Beranek; Luca Benini; Torsten Hoefler

Journal title: 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA)

Journal number: 9

Journal publisher: IEEE

Published year: 2021

DOI identifier: 10.1109/isca52012.2021.00079