A Hybrid Cache HW/SW Stack for Optimizing Neural Network Runtime, Power and Endurance.

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Authors: Simon, William Andrew, Alexandre Levisse, Marina Zapater, and David Atienza

Journal title: 28th International Conference on Very Large Scale Integration (VLSI-SOC)

Journal publisher: IEEE

Published year: 2020

Published pages: 94-99

DOI identifier: 10.1109/vlsi-soc46417.2020.9344087

ISBN: 978-1-7281-5410-7