Thermal Analysis and Interpolation Techniques for a Logic + WideIO Stacked DRAM Test Chip

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Authors: Francesco Beneventi, Andrea Bartolini, Pascal Vivet, Luca Benini

Journal title: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Journal number: 35/4

Journal publisher: Institute of Electrical and Electronics Engineers

Published year: 2016

Published pages: 623-636

DOI identifier: 10.1109/tcad.2015.2474382

ISSN: 0278-0070