A Review of Low Temperature Process Modules Leading Up to the First (≤500 °C) Planar FDSOI CMOS Devices for 3-D Sequential Integration

Summary

This is a publication. If there is no link to the publication on this page, you can try the pre-formated search via the search engines listed on this page.

Authors: C. Fenouillet-Beranger, L. Brunet, P. Batude, L. Brevard, X. Garros, M. Casse, J. Lacord, B. Sklenard, P. Acosta-Alba, S. Kerdiles, A. Tavernier, C. Vizioz, P. Besson, R. Gassilloud, J.-M. Pedini, J. Kanyandekwe, F. Mazen, A. Magalhaes-Lucas, C. Cavalcante, D. Bosch, M. Ribotta, V. Lapras, M. Vinet, F. Andrieu, J. Arcamone

Journal title: IEEE Transactions on Electron Devices

Journal number: 68/7

Journal publisher: Institute of Electrical and Electronics Engineers

Published year: 2021

Published pages: 3142-3148

DOI identifier: 10.1109/ted.2021.3084916

ISSN: 0018-9383