Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic memory blocks

This is a publication. If there is no link to the publication on this page, you can try the pre-formated search via the search engines listed on this page.

Authors: Christophe Layer, Kotb Jabeur, Stephane Gros, Laurent Becker, Pierre Paoli, Fabrice Bernard-Granger, Virgile Javerliac, Bernard Dieny

Journal title: 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)

Journal publisher: IEEE

Published year: 2015

Published pages: 1-4

DOI identifier: 10.1109/NEWCAS.2015.7181999

ISBN: 978-1-4799-8893-8