Simulation Study of Vertically Stacked Lateral Si Nanowires Transistors for 5-nm CMOS Applications

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Authors: Talib Al-Ameri, Vihar P. Georgiev, Fikru Adamu-Lema, Asen Asenov

Journal title: IEEE Journal of the Electron Devices Society

Journal number: 5/6

Journal publisher: Institute of Electrical and Electronics Engineers Inc.

Published year: 2017

Published pages: 466-472

DOI identifier: 10.1109/jeds.2017.2752465

ISSN: 2168-6734