NSP: Physical compact model for stacked-planar and vertical Gate-All-Around MOSFETs

This is a publication. If there is no link to the publication on this page, you can try the pre-formated search via the search engines listed on this page.

Authors: O. Rozeau, S. Martinie, T. Poiroux, F. Triozon, S. Barraud, J. Lacord, Y. M. Niquet, C. Tabone, R. Coquand, E. Augendre, M. Vinet, O. Faynot, J.-Ch. Barbe

Journal title: 2016 IEEE International Electron Devices Meeting (IEDM)

Journal publisher: IEEE

Published year: 2016

Published pages: 7.5.1-7.5.4

DOI identifier: 10.1109/IEDM.2016.7838369

ISBN: 978-1-5090-3902-9