Low latency reconfiguration mechanism for fine-grained processor internal functional units

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Authors: Raphael Segabinazzi Ferreira, Jorg Nolte

Journal title: 2019 IEEE Latin American Test Symposium (LATS)

Journal publisher: IEEE

Published year: 2019

Published pages: 1-6

DOI identifier: 10.1109/latw.2019.8704560

ISBN: 978-1-7281-1756-0