New Fault Models and Self-Test Generation for Microprocessors using High-Level Decision Diagrams

Summary

This is a publication. If there is no link to the publication on this page, you can try the pre-formated search via the search engines listed on this page.

Authors: Jasnetski, Artjom; Raik, Jaan; Tsertov, Anton; Ubar, Raimund

Journal title: IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - DDECS

Journal publisher: IEEE Computer Society Press

Published year: 2015

Published pages: 1-6