Summary
The fabrication of a range of simple test device structures (no more than three photolithographic steps) to better understand the Si/SiC thin film materials characteristics, prior to full transistor fabrication. Devices to include lateral power Schottky PiN and gated diodes, MOS capacitors, resistor bars, TLM structures and hall bars. Equivalent devices on SOI and Si will benchmark performance. All material will come from WP3, the mask set and procedure from WP2.
More information & hyperlinks