Modeling and Analysis of SRAM PUF Bias Patterns in 14nm and 7nm FinFET Technology Nodes

Summary

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Authors: Shayesteh Masoumian Intrinsic ID B.V., Eindhoven, The Netherlands,Faculty of EE, Mathematics and CS, Delft University of Technology, Delft, The Netherlands ; Roel Maes; Rui Wang; Karthik Keni Yerriswamy; Geert-Jan Schrijen; Said Hamdioui

Journal publisher: IEEE

Published year: 2023

DOI identifier: 10.1109/VLSI-SoC57769.2023.10321895