Implementation of pre-processing, monitoring and energy measurement Rev B

FPGA implementation of trace data pre-processing, external bus monitoring and energy measurement Revision B: Trace data pre-processing for QorIQ (Nexus Aurora interface, min 1.5 GHz, min 2 cores) and ARM Cortex-A53 (Coresight interface, min 1.2 GHz, min 2 cores), trace integration from multiple sources, external bus trace pre-processing (CAN, Ethernet), Revision B