Sub-20 nm multilayer nanopillar patterning for hybrid SET/CMOS integration

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Authors: M.-L. Pourteau, A. Gharbi, P. Brianceau, J.-A. Dallery, F. Laulagnet, G. Rademaker, R. Tiron, H.-J. Engelmann, J. von Borany, K.-H. Heinig, M. Rommel, L. Baier

Journal title: Micro and Nano Engineering

Journal number: 9

Journal publisher: Elsevier

Published year: 2020

Published pages: 100074

DOI identifier: 10.1016/j.mne.2020.100074

ISSN: 2590-0072