Summary
Designed MMIC’s and packages will be scrutinized from the level of MMIC schematics, layout and simulation performance. The evaluation of simulated performance includes consideration of involved models, small-signal S parameters simulations, Harmonic balance simulations, and EM simulations of passives. The report will include bare-die performance, and a particular focus on the influence from the FOWLP. In this first run the main focus is not on reaching utmost performance of the packaged components, but to understand material system interactions to prepare for high-end performance in the second manufacturing run. The CDR Run 1 will end with the delivery of the stack of GDS files from the design, the different versions and the test patterns as well as the package details. All this material will be documented together with the output from the CDR into a written report
This deliverable is also a milestone, M1
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