Advanced physical simulation and optimization of FBDRAM cells using 3DMSEMC tools.

Linked to T3.3 and T3.6. Once the 3D-MS-EMC simulator has been implemented, calibrated and fully validated for the simulation of advanced Si-nanowire bsed devices (FinFETs, Tirgates, etc.) as detailed in D3.8, it will used to simulate and optimize FB-DRAM memory cells based on these advanced FET devices. Deliverable D3.11 will collect the results of the simulations performed and the memory cell optimization process.