Functional characterization of the memory matrix

This deliverable is linked to Task T2.7. The deliverable will report on the functional characterization of the Integrated memory array (demonstrator). The memory array will be tested with pulse trains according to test algorithm via word line. Through this work, functional error will be detected and completely checked by DRAM tester. At first stage, functional test will be done on wafer probe station and after full package, DRAM will be tested with logic function tester. A first version will be launched at M27 withe results obtained on wafer, and an upgraded version will be elaborated with the results obtained with packed devices at M33.