Spice macro compact model for selected FD_DRAM cell structure

Linked to T3.3 and T3.4. The deliverable will describe the Spice macro models which describe the electrostatic behavior of FBDRAM cells designed in REMINDER, based on models developed in T4.1 and T4.2. The macro model development will be first based on a behavioural model in order to establish the topology of the core model and, based on this first step, the physics-based analytical model will be developed in Verilog-A in order to be fully compatible with SPICE simulators. The uniform and statistical compact modelling strategies will be developed for Spice macro model of selected FD_DRAM cell. The Spice macro model will be implemented into the PDK, and it will be improved at every device design iteration stage either in TCAD or in Silicon.