ERD

Full transceiver/antenna subsystem with high performance ready for measurements

Project: WiPLASH

Updated at: 10-06-2024

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Project acronym WiPLASH

Periodic Reporting for period 2 - WiPLASH (Architecting More Than Moore – Wireless Plasticity for Heterogeneous Massiv...

Project: WiPLASH

Updated at: 10-06-2024

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Project acronym WiPLASH

In-Memory accelerator

Project: WiPLASH

Updated at: 01-06-2024

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Project acronym WiPLASH

First co-integration of graphene antennas with full custom SiGe transceivers

Project: WiPLASH

Updated at: 01-06-2024

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Project acronym WiPLASH

SiGe BiCMOS test devices

Project: WiPLASH

Updated at: 01-06-2024

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Project acronym WiPLASH

Release of the open-source simulator with benchmark architectures

Project: WiPLASH

Updated at: 01-06-2024

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Project acronym WiPLASH

High performance graphene on wafer scale including encapsulation

Project: WiPLASH

Updated at: 01-06-2024

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Project acronym WiPLASH

Genome sequence alignment - Design space exploration for optimal performance and energy architectures

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

wireless plasticity for massive heterogeneous computer architectures (WiPLASH)

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Improving stability in two-dimensional transistors with amorphous gate oxides by Fermi-level tuning

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Scale up your in-memory accelerator: leveraging wireless-on-chip communication for aimc-based cnn inference

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Exec...

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Thermal and Voltage-Aware Performance Management of 3D MPSoCs with Flow Cell Arrays and Integrated SC Converters

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Low-cost Compact Analogue Phase-Shifter based on CVD Graphene-diode for Smart Surfaces Applications

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

End-to-end 100-TOPS/W Inference With Analog In-Memory Computing: Are We There Yet?.

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Toward Dynamically Adapting Wireless Intra-Chip Channels to Traffic Needs with a Programmable Metasurface

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Validating Full-System RISC-V Simulator: A Systematic Approach

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Tunable and switchable graphene multiantenna report

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

BLADE: An in-Cache Computing Architecture for Edge Devices

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Terahertz Rectennas on Flexible Substrates Based on One-Dimensional Metal–Insulator–Graphene Diodes

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Wireless On-Chip Communications for Scalable In-memory Hyperdimensional Computing

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Integrated Graphene Patch Antenna for Communications at THz Frequencies

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Characterizing the Communication Requirements of GNN Accelerators: A Model-Based Approach

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Package-level exploration

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Die-level exploration at design-time/runtime

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Analysis of Functional Errors Produced by Long-Term Workload-Dependent BTI Degradation in Ultralow Power Processors

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Energy-Efficient Hardware-Accelerated Synchronization for Shared-L1-Memory Multiprocessor Clusters

Project: WiPLASH

Updated at: 27-04-2024

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Project acronym WiPLASH

Resources

Selected filters:

Full transceiver/antenna subsystem with high performance ready for measurements

Periodic Reporting for period 2 - WiPLASH (Architecting More Than Moore – Wireless Plasticity for Heterogeneous Massiv...

In-Memory accelerator

First co-integration of graphene antennas with full custom SiGe transceivers

SiGe BiCMOS test devices

Release of the open-source simulator with benchmark architectures

High performance graphene on wafer scale including encapsulation

Genome sequence alignment - Design space exploration for optimal performance and energy architectures

wireless plasticity for massive heterogeneous computer architectures (WiPLASH)

Improving stability in two-dimensional transistors with amorphous gate oxides by Fermi-level tuning

Scale up your in-memory accelerator: leveraging wireless-on-chip communication for aimc-based cnn inference

A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks

Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Exec...

Thermal and Voltage-Aware Performance Management of 3D MPSoCs with Flow Cell Arrays and Integrated SC Converters

Low-cost Compact Analogue Phase-Shifter based on CVD Graphene-diode for Smart Surfaces Applications

End-to-end 100-TOPS/W Inference With Analog In-Memory Computing: Are We There Yet?.

Toward Dynamically Adapting Wireless Intra-Chip Channels to Traffic Needs with a Programmable Metasurface

DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs

Validating Full-System RISC-V Simulator: A Systematic Approach

Tunable and switchable graphene multiantenna report

BLADE: An in-Cache Computing Architecture for Edge Devices

Terahertz Rectennas on Flexible Substrates Based on One-Dimensional Metal–Insulator–Graphene Diodes

Wireless On-Chip Communications for Scalable In-memory Hyperdimensional Computing

Integrated Graphene Patch Antenna for Communications at THz Frequencies

Characterizing the Communication Requirements of GNN Accelerators: A Model-Based Approach

Package-level exploration

Die-level exploration at design-time/runtime

Analysis of Functional Errors Produced by Long-Term Workload-Dependent BTI Degradation in Ultralow Power Processors

Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing

Energy-Efficient Hardware-Accelerated Synchronization for Shared-L1-Memory Multiprocessor Clusters